1. Field of the Invention
The present invention generally relates to the distribution of clock signals to digital circuits on integrated circuit (IC) chips and, more particularly, to a clock chopper/stretcher circuit for receiving a system clock from off-chip and distributing a clock pulse to the on-chip circuits that require clocking while adding minimal insertion delay. The invention has particular application in high performance, or high-end, computing machines and especially in memory circuits for such machines.
2. Description of the Prior Art
On-chip clock distribution circuits for high-performance or high-end computing machines must be able to tailor an incoming clock pulse by both chopping (reduce the width) and stretching (extend the width) of a system generated clock pulse to obtain the desired pulse width. This is necessary because only the start of the system clock pulse is controlled and the end is unpredictable or has a very large tolerance. But the clock distribution circuits must also introduce a minimum of clock delay to provide early gating of address and data. In addition, the clock distribution circuits must respond only to input transitions and not levels in order to provide testing flexibility.
Prior art chopper/stretcher designs use logic macros that are cross-coupled to form a complex latch that adds an undesirable large insertion delay in the clock path. While these designs accomplish the twin requirements of chopping and stretching a system generated clock pulse to obtain the desired pulse width, they are generally unsuitable for high-end machines because they introduce excessive clock delay.
Also known in the prior art are U.S. Pat. No. 4,851,711 to Chan et al. and a related IBM Technical Disclosure Bulletin, vol. 29, no. 7, Dec. 1986, pp. 3148-3151, by Chan entitled "Clock Chopper for Complementary-Transistor Switch Arrays". The disclosed circuits chop a clock pulse, making it shorter than the system supplied pulse; however, these circuits do not stretch the clock pulse if it is already too short. This means that the system clock must be longer (i.e., wider) than the pulse required by the clocked circuits.
U.S. Pat. No. 3,831,098 to Fletcher et al. discloses a pulse stretcher specifically for stretching short pulses of several nanoseconds width to wider pulses of typically one microsecond for further processing by commercial pulse height analyzers. This pulse stretcher is not adaptable to high speed memory applications, mainly because it introduces a very large delay which is acceptable for its specialized application. It is not a clock chopper.
U.S. Pat. No. 3,594,733 to Lukens II discloses a pulse stretcher designed for very low speed recirculating memory applications. Its purpose is to synchronize two pulses. It is not a clock chopper and would introduce a large clock delay in any practical implementation.
U.S. Pat. No. 3,150,324 to Hallden et al. describes a recirculating loop delay line that operates at very low speeds (e.g., ultrasonic) for data accumulation systems. This Hallden et al. circuit is neither a stretcher or a chopper.
IBM Technical Disclosure Bulletin, vol. 31, no. 9, Feb. 1989, pp. 310-311, by Knebel et al. entitled "Redundant Clock Chopper", describes a redundancy scheme to avoid chip failure if one clock chopper circuit fails or has manufacturing faults. This circuit only chops a clock pulse. It cannot stretch a pulse if the system clock is too short.
IBM Technical Disclosure Bulletin, vol. 32, no. 7, Dec. 1989, pp. 120-121, by Budell entitled "Redundant Clock Chopper with Clock-Chopper Inhibit", describes a clock chopper that is similar to the circuit disclosed by Knebel et al., supra. This circuit also chops but does not stretch.
IBM Technical Disclosure Bulletin, vol. 32, no. 8A, Jan. 1990, pp. 136-139, by Gupte et al. entitled "Clock Chopper On-Chip Delay and Pulse-Width Measurement Technique", describes a method of accurately measuring the width of a chopped clock by using the on-chip McLeod technique. The chopper circuit is not described and there is no mention of pulse stretching.
Thus, there remains to be solved the difficult problem of both stretching a system supplied clock that is too short (i.e., narrow) for the circuits that it must drive and to also chop the same clock if it is too long (i.e., wide) for those same circuits. Moreover, in high-end machines it is desirable to accomplish these functions without introducing a large circuit delay in the clock network.